1. Field of the Invention
The present invention relates to differential CMOS and silicon-on-insulator (SOI) logic devices, and in particular to differential cascode voltage switch (DCVS) logic devices and domino circuit logic devices.
2. Background of the Invention
Differential CMOS and SOI logic is often used when it is desired to perform complex Boolean logic functions and circuit density is an important design concern. Potentially, DCVS and domino circuit logic is twice as dense as primitive NAND/NOR logic. In DCVS and domino circuit logic, differential pairs of MOS devices are cascaded into powerful combinational logic tree networks.
The ongoing demand for reduction in the power and xe2x80x9cfootprintxe2x80x9d of logic devices can give rise to signal stability problems in DCVS and domino logic. To save power required to drive MOSFET gate capacitance, a natural design consideration is to reduce gate size. Unfortunately, signal stability is often compromised as MOSFET gates are reduced in size, thereby giving rise to errors in logic evaluation.
Use of SOI technology in connection with DCVS and domino circuit logic can be problematic because of junction leakage. Due to the electrically floating body of an SOI MOSFET, charge leaking across its drain-body or source-body junction diode has the ability over time of changing the potential of the body. This change gives rise to threshold voltage variation and hence delay variation. The body contact used to hold the SOI MOSFET body potential to a fixed voltage in cases where variation is intolerable also tends to reduce performance.
Low voltage operation of logic circuits can be used to reduce power in a logic circuit, but can be problematic with high or nominal threshold MOSFET transistors. The overdrive voltage required to turn on a device is given by Vod=Voxe2x88x92VT, where Vo is the drive voltage of the preceding logic gate, and VT is the threshold voltage of the MOSFET. It is desirable to operate the logic transistors with a low VT to maximize the overdrive voltage Vod, resulting in higher speed operation, proportional to the overdrive voltage. A consequence of operating transistors with a low VT results in large D.C. parasitic leakage currents
One aspect of the present invention is a logic circuit, comprising a plurality of evaluate transistors, each having a body, and a differential load structure connected to each of the bodies.
Another aspect of the present invention is a method of enhancing stability of a differential logic circuit. The method involves providing a differential logic circuit having a plurality of transistors arranged in a first evaluate tree and a second evaluate tree, each transistor having one of a single gate with a body and a double gate, and a differential load structure having a first intermediate output node and a second intermediate output node. The next step involves biasing, in the first evaluate tree, the body of each transistor when each transistor has a single gate or at least one of the double gates of each transistor when each transistor has a double gate with voltage present at the second intermediate node. Then, the next step involves biasing, in the second evaluate tree, the body of each transistor when each transistor has a single gate and the at least one of the double gates of each transistor when each transistor has a double gate with voltage present at the first intermediate node.
Yet another aspect of the present invention is a logic circuit comprising a plurality of evaluate transistors, each having first and second gates and a differential load structure connected to the first gates of the plurality of transistors.
Another aspect of the present invention is a method to automatically adjust the threshold of evaluate transistors by connection of body nodes to force the bodies of the evaluate transistors to a high level before the gate is evaluated then self-adjusting the bodies to a lower potential for evaluate trees that did not discharge after logic evaluation, increasing evaluation speed and lowering overall leakage of the function.